Seoul [South Korea], January 29 : Samsung Electronics is nearing the mass production of its next-generation HBM4 memory chips, with the company expected to begin manufacturing as early as next month.
According to a report by the Korea Herald, initial shipments of these advanced chips are slated for major customers, including Nvidia and AMD. The move signals a potential turning point for Samsung as it seeks to regain ground in the high-bandwidth memory market for artificial intelligence, a sector where it has recently trailed behind its smaller rival SK hynix.
The company's strategy to bridge the competitive gap relies on the industry-first adoption of a sixth-generation 10-nanometer (1c) DRAM process. Despite facing weak early yields, Samsung has pushed forward with this technology and applied an advanced 4-nanometer foundry process to the logic die, which acts as the control unit for the memory stack.
The report states that Samsung recently passed final qualification tests for both Nvidia and AMD, paving the way for full-scale production to support next-generation AI accelerators like Nvidia's Rubin platform and AMD's MI450, both scheduled for release in the second half of this year.
This production milestone comes amid a shift in industry requirements. Leading AI chip customers have reportedly adjusted their qualification benchmarks to prioritise raw performance, raising speed requirements while easing thermal limits. Insiders noted that these changes follow advancements in custom accelerators, such as Google's tensor processing units, which have demonstrated performance levels comparable to or exceeding current market-leading GPUs.
In recent qualification testing, Samsung's HBM4 chips achieved data transfer speeds of 10.7 gigabits per second, surpassing Nvidia's requirement of 10 Gbps. In comparison, recent tests for products from SK hynix and Micron Technology recorded speeds of approximately 8.3 Gbps and 8 Gbps, respectively.
An industry expert who requested anonymity told The Korea Herald, "The shift in market demand raised the bar for speed while allowing higher operating temperatures. Samsung's decision to push ahead with the 1c DRAM process, despite very low initial yields, appears to have been critical in achieving the required performance."
The technical configuration of Samsung's HBM4, combining the 1c DRAM process with an in-house 4-nanometer logic die, offers greater design flexibility in through-silicon via density and routing. This architecture allows for higher input and output speeds compared to competing models.
By contrast, SK hynix's HBM4 utilises a fifth-generation 10-nanometer (1b) DRAM process and a 12-nanometer logic die. The report suggests that SK hynix has recently redesigned its HBM4 chips while maintaining the 1b process and is currently awaiting new evaluation results.
The timing is critical for memory suppliers. Nvidia CEO Jensen Huang said earlier this month that the company's next-generation Vera Rubin platform is already in "full production" ahead of its launch in the second half of this year.